In the conventional multiplexing system based on an asynchronous PCM hierarchy, it has been very difficult to directly extract desired signal from a multiplexed group signal and output it for transmitting and exchanging a broad band signal such as a video signal, because the time slot of each signal in the multiplexed group signal is not fixed. With spreading of the broadband service network, it is now discussed to construct a synchronous network using a high order PCM hierarchy to reduce the influence of jitter, etc. Under such condition, it is also discussed to employ the synchronous multiplexing system in which the basic signal rate of broadband ISDN (Integrated Services Digital Network) is selected to several tens of M bps and the multiplexing PCM hierarchy is set to an integer multiple of this basic rate.
Since the multiplexing hierarchy is set to an integer multiple of the basic signal rate in this synchronous multiplexing system, an extra signal (such as frame synchronization signal, control signal, etc.) is not inserted in the unit of multiplexing. Therefore the control signal, etc. which is required for multiplexing is prepared based on the basic signal frame and the multiplexing is carried out by using such control signal region. Thereby, structure of multiplexing part which is required to have high speed characteristic is very much simplified (can be formed only by the parallel-to-serial (P/S) convertion, serial-to-parallel (S/P) conversion), and it is possible to employ the structure which is just suited to high speed processing because it is enough to execute the frame synchronizing processing and control processing of channel switching part for multiplexing channel correspondence at the basic signal rate. Here, the channel switching is carried out to set the correspondence of channels through the channel switching because the channel number at the time of multiplexing does not always match the channel number after multiplexing since the high speed multiplexing part has the function of only the P/S conversion, S/P conversion.
However, this structure does not result in any problem when service is provided at a rate under the basic signal rate, namely such structure is used as a pipe-line, but it probably generates a phase difference on the basic signal frame after the demultiplexing in the wide area service where a plurality of basic signal frames must be used in concatenation. Therefore, there is a need to develop a synchronized multiplexing system which does not generate such a phase difference.
In the synchronous multiplexing system of the prior art, channel correspondence has been established by discriminating the multiplexing control signal written in the basic signal frame after demultiplexing and controlling the channel switching part located immediately after a latch circuit for demultiplexing based on such discrimination result.
FIG. 1 is a frame structure of the basic signal. As indicated in this figure, the frame structure comprises a control signal and information signal (D) and the control signal is formed by the frame synchronization signal (F), multiplexing control signal (ID) and maintenance supervisory signal, etc.
FIG. 2 is an example of the structure of a synchronized multiplexing device of the prior art. In the sending side, the particular multiplexing channel numbers are respectively written to the multiplexing control signal ID for the basic signal FB of respective channels CH1, CH2, . . . , CHn in the discrimination signal writing parts l.sub.1, l.sub.2, . . . , l.sub.n of each channel of the multiplexing part. In the P/S converting part 2, the basic signal of each channel to which the multiplexing channel numbers are written is converted a serial signal from a parallel signal to generate the multiplexing signal nFB. The control part (CONT) 3 controls the operation timing of respective portions of the multiplexing part. The multiplexing signal nFB in the output of the P/S converting part 2 is sent to the receiving side through the transmission line 4.
In the receiving side, the input multiplexing signal is converted to a parallel signal from the serial signal by a S/P converting part 5 in the demultiplexing part. Thereby, such signal is isolated to the signals SR1, SR2, . . . ,SRn having different timings. These signals are latched in accordance with the timing signal of a counter 7 to generate the basic signals CH1', CH2', . . . CHn' through a speed conversion. With such timing, multiplexing channel numbers of the basic signals of each channel do not always correspond to those in the sending side.
A multiplexing channel number discriminating part (FSYNC, ID DET) 8, sets frame synchronization. For example, CHn' of particular channel and the multiplexing channel number is also discriminated. A switch part 9 is then controlled and the sequence of basic signals of respective channels is replaced so that the discriminated multiplexing channel numbers match the the intrinsic multiplexing channel numbers of the pertaining channel. Thereby, the output signal having the channel numbers CH1, CH2, . . . , CHn correspond to the channel number at the time of multiplexing in the sending side can be obtained.
Since the structure of synchronized multiplexing device indicated in FIG. 2 is intended to use the basic signal as the pipe, in case a plurality of basic signal frames are used in concatenation, phase adjustment is necessary among a plurality of channels because the phase relation of respective channels does not always match the phase relation before multiplexing.
Namely, if three basic signals with a basic signal rate of 50 Mbps are used in concatenation, for example, and a signal of 150 Mbps is transmitted, then the following cases occur depending on the structure of a network.
1. Three coupled basic signals are transmitted respectively by different routes and frame phase differences are generated among the three basic signals due to path delay time differences.
2. Even when three basic signals are transmitted by the same multiplexing transmission line, frame phase difference is generated between the coupled basic signals depending on the method of multiplex isolation.
The problem 1 can be solved ,by controlling the network so that the three basic signals are sent on the same transmission line. However, the problem 2 cannot be solved by the conventional demultiplexing method.
FIG. 3 is a time chart of demultiplexing in a conventional synchronous multiplexing device. An input data multiplexed in FIG. 3 generates the outputs sequentially with delay of a bit at the outputs SR1, SR2, . . . , SRn of the S/P converter 5. The latch part 6 latches these signals in accordance with a fixed timing signal PH1 of a counter 7 to change the speed and isolate the signals to the basic signals CH1', CH2', . . . , CHn'. Since this basic signal does not correspond to the sending side in the channel number, the channels are replaced at the switch part 9 by discriminating the multiplexed channel numbers in order to set again the channel number correspondence. In this case, it is probable, as indicated in FIG. 3, that a phase difference of one bit is generated in each channel output.
Therefore, phase control is necessary among respective channels coupled by inserting a function to give or eliminate delay of one bit in the output of a switch part. Otherwise, if a video signal is transmitted as the sending signal, it is also probable that MSB (Most Significant Bit) and LSB (Least Significant Bit) in a byte of an output signal may be replaced due to the difference of one bit. In this case, the reproduced information of image data becomes useless.